AS91L1003U JTAG Gateway

Alliance's AS91L1003U is a one to 3-port JTAG gateway. It partitions a single JTAG chain into three separate chains. These separate chains can be optionally configured to operate as a single chain.

The AS91L1003U from Alliance Semiconductor is used to provide enhanced capabilities to the standard IEEE1149.1. It enables the IEEE1149.1 interface to be used in a true Multi-Drop environment without any additional signals. This Multi-Drop capability enables the standard IEEE1149.1 interface to be used not just for stand alone Printed Circuit Board (PCB) testing, but complete system testing including all PCBs within a system back plane environment.

The AS91L1003U provides the capability of partitioning the PCB into multiple smaller IEEE1149.1 scan chains totally under software control. Partitioning the IEEE1149.1 chains on the PCB has several benefits, which include easier fault diagnostics capabilities, as a fault on one of the IEEE1149.1 Local Scan Ports (LSPs) does not render the PCB un-testable, faster flash programming on the PCB’s and removal of IEEE1149.1 signal loading issues.

All of the protocols required for addressing the AS91L1003U device via the Multi-Drop capability and the protocols for configuring which of the three IEEE1149.1 LSPs of the AS91L1003U are to be used, is handled via the 3 rd party ATPG tools from vendors like Asset-Intertech and JTAG Technologies. In a Multi-Drop environment, it is also possible to perform interconnect tests between multiple PCBs within the system thus extending the interconnect tests to the back plane itself.

Features:

Support for 3 local scan chains addressable via the IEEE1149.1 interface
Device multi-drop addressable via the IEEE1149.1 protocol
Support for Pass-through ä mode
Support for the IEEE1149.1 USERCODE instruction
Support for Status instruction enabling non-intrusive monitoring of the system card
Local Scan Port (LSP) enable signal provides the ability to use non IEEE1149.1 compliant devices that require the JTAG enable signal
Provides the ability to initiate self test on a remote PCB via a standard IEEE1149.1 command
Support for JTAG Technologies AutoWR ä feature
Pinout and feature set compatible (complete second source) with the Firecron JTS03U device
3.3V Core and IO
5V Tolerant IOs

Applications:

Enterprise LAN switches
Storage systems and switches (SAN, NAS, RAID, FC)
Firewalls, VPN and security gateways
High-end computing systems
Servers and server clusters
Printing, graphics, and imaging Systems
Edge, access routers and MAN switches
Wireless gateways
Voice and multimedia access gateways
Multiservice access concentrators
Test equipment with network probes

Device Block Diagram:

System Block Diagram:

Products:

AS91L1003U-10L100-C

U = 16-bit user code
100-Pin LQFP Package
Commercial Temperature: 0 to 70 degrees C.

AS91L1003U-10L100-I

U = 16-bit user code
100-Pin LQFP Package
Industrial Temperature: -40 to 85 degrees C.