AS91L1001 JTAG Device

Alliance's AS91L1001 JTAG device provides an interface between the 60x bus on the Motorola MPC8260 processor and two totally independent IEEE1149.1 interfaces, namely, the primary and secondary ports. The AS91L1001 handles all the protocol for the 60x bus to write and read directly to registers within the device with no additional glue logic.

The AS91L1001 is available in a 100-pin LQFP or a 100-pin FPBGA lead free package. In addition, the AS91L1001 supports both commercial (0 to 70 degrees C) as well as industrial (-40 to 85 degrees C) temperatures.

The AS91L1001 has three distinct modes of operation, namely Slave mode, Master mode, and 3 rd Party Support mode. These different modes control how data will be transferred on the IEEE1149.1 buses.

Slave mode : This is the default mode after the AS91L1001 has received a power-on reset. In this mode, there is a transparent connection between the primary and secondary JTAG ports. The processor interface is not used in the slave mode. This configuration is typically used to test a line card from a system back plane (the primary port is usually connected to the back plane and the secondary port is connected to the onboard JTAG chain). Once testing from the system back plane is completed, the AS91L1001 is reconfigured for master mode operation through a register. The master mode of operation is used to test the onboard JTAG chain, using the microprocessor interface.

Master mode : This mode is accessed via a command to a AS91L1001 register. The key feature of this mode is that both the Primary and Secondary are now both totally independent IEEE1149.1 bus masters, which enable concurrent operation on both the IEEE1149.1 channels. The Master mode enables the primary IEEE1149.1 channel to be used to access other PCB’s connected via the 5-wire IEEE1149.1 interface on the back plane.

3 rd Party Support mode : This mode enables serial shifting of data on any of the two JTAG ports. This mode is used to configure legacy FPGA/CPLD devices.

Features:

• Interfaces between processors with Motorola like bus and two IEEE1149.1 JTAG ports
• Eliminates the need for external test equipment to run 1149.1 JTAG tests.
• Supports a wide range of 3 rd party tools for test generation
• Pinout and feature set compatible (complete second source) with the Firecron JTS01 device
• Available in a 100-pin lead-free LQFP package or a 100-pin FPBGA green package
• 3.3V Core and IO

Applications:

• Enterprise LAN switches
• Storage systems and switches (SAN, NAS, RAID, FC)
• Firewalls and security gateways
• High-end computing systems
• Servers and server clusters
• Printing, graphics, and imaging Systems
• VPN switches and routers
• Edge and access routers
• MAN switches
• Wireless gateways
• Voice and multimedia access gateways
• Multi-service access concentrators
• IP service switches and core routers
• Test equipment with network probes

Device Block Diagram:

System Block Diagram:

Products:

AS91L1001-10L100-C	100-Pin LQFP Package Commercial Temperature: 0 to 70 degrees C.
AS91L1001-10L100-I	100-Pin LQFP Package Industrial Temperature: -40 to 85 degrees C.