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9-bit video decoder: 2 ADCs, 4 analog inputs, Industrial Temp

Manufacturer:   Trident Microsystems
Part #:  
SAF7113H/V1
Availability   Short Lead Time
 
Features 
  • Four analog inputs, internal analog source selectors, e.g. 4 x CVBS or 2 x Y/C or (1 x Y/C and 2 x CVBS)
  • Two analog preprocessing channels in differential CMOS style for best S/N-performance
  • Fully programmable static gain or automatic gain control for the selected CVBS or Y/C channel
  • Switchable white peak control
  • Two built-in analog anti-aliasing filters
  • Two 9-bit video CMOS Analog-to-Digital Converters (ADCs), digitized CVBS or Y/C-signals are available on the VPO-port via IC-bus control
  • On-chip clock generator
  • Line-locked system clock frequencies
  • Digital PLL for horizontal sync processing and clock generation, horizontal and vertical sync detection
  • Requires only one crystal (24.576 MHz) for all standards
  • Automatic detection of 50 Hz and 60 Hz field frequency and automatic switching between PAL and NTSC standards
  • Luminance and chrominance signal processing for PAL BGHI, PAL N, combination PAL N, PAL M, NTSC M, NTSC N, NTSC 4.43, NTSC-Japan and SECAM
  • User programmable luminance peaking or aperture correction
  • Cross-color reduction for NTSC by chrominance comb filtering
  • Low power (< 0.5 W), low voltage (3.3 V), small package (QFP44)
  • Power saving mode by chip enable input
  • Detection of copy protected input signals according to the Macrovision standard; can be used to prevent unauthorized recording of pay-TV or video tape signals.
 
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Manufacturer:
 
Features 
  • Four analog inputs, internal analog source selectors, e.g. 4 x CVBS or 2 x Y/C or (1 x Y/C and 2 x CVBS)
  • Two analog preprocessing channels in differential CMOS style for best S/N-performance
  • Fully programmable static gain or automatic gain control for the selected CVBS or Y/C channel
  • Switchable white peak control
  • Two built-in analog anti-aliasing filters
  • Two 9-bit video CMOS Analog-to-Digital Converters (ADCs), digitized CVBS or Y/C-signals are available on the VPO-port via IC-bus control
  • On-chip clock generator
  • Line-locked system clock frequencies
  • Digital PLL for horizontal sync processing and clock generation, horizontal and vertical sync detection
  • Requires only one crystal (24.576 MHz) for all standards
  • Automatic detection of 50 Hz and 60 Hz field frequency and automatic switching between PAL and NTSC standards
  • Luminance and chrominance signal processing for PAL BGHI, PAL N, combination PAL N, PAL M, NTSC M, NTSC N, NTSC 4.43, NTSC-Japan and SECAM
  • User programmable luminance peaking or aperture correction
  • Cross-color reduction for NTSC by chrominance comb filtering
  • Low power (< 0.5 W), low voltage (3.3 V), small package (QFP44)
  • Power saving mode by chip enable input
  • Detection of copy protected input signals according to the Macrovision standard; can be used to prevent unauthorized recording of pay-TV or video tape signals.
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