8-Chan Fail-Safe P-FET Driver to 36V

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Product Information

iC-MFP is a monolithically integrated, 8-channel inverting level adjustment device which drives Pchannel FETs. The internal circuit blocks have been designed in such a way that with single errors, such as open pins (VB, VBR, GND, GNDR) or the shortcircuiting of two outputs, iC-MFP’s output stages switch to a predefined, safe high state. Externally connected P-channel FET are thus shut down safely in the event of a single error. The inputs of the eight channels consist of a Schmitt trigger with a pull-down current source and are compatible with TTL and CMOS levels and are voltageproof up to 40 V. The eight channels have a currentlimited push-pull output stage and a pull-up resistor at the output. The hi-level at one of the inputs EN5, EN10 or ENFS defines the output lo-level VB - 5 V, VB - 10 V or GND voltage and enables the outputs. The output lo-level is disabled with the lo-level at all inputs EN5, EN10 and ENFS or with the hi-level at more than one input. iC-MFP monitors the supply voltage at VB and VBR pin and the voltages at the two ground pins GND and GNDR. Both power supply pins VB and VBR and both pins GND and GNDR must be connected together externally in order to guarantee the safe high state of the output stages in the event of error. Should the supply voltage at VB undershoot a predefined threshold, the voltage monitor causes the outputs to be actively tied to VB via the highside transistors. If the supply voltage ceases to be applied to VB, the outputs are tied to VBR by pull-up resistors. If the connection between the ground potential and the GND or GNDR pin is disrupted, the highside transistors are activated. Pull-down currents provide the safe lo-level at open inputs IN1. . . 8, EN5, EN10 and ENFS. The pulldown currents have two stages in order to minimize power dissipation with enhanced noise immunity. When two outputs of different logic states are short circuited, the driving capability of the highside driver predominates, keeping the connected P-channel FETs in a safe shutdown state. The status of the device is indicated with the Open- Drain pin NOK and can be used for system diagnostics. Temperature monitoring protects the device from too high power dissipation. The device is protected against destruction by ESD.


8-fold level shift up to 40 V output voltage
Ground and supply voltage monitor
Inputs compatible with TTL and CMOS levels, 40 V voltage proof
Protective ESD circuitry
Safe high output state with single errors
Short-circuit-proof push-pull current sources for driving FETs slowly
Status output for error and system diagnostics
Temperature range from -40 to 125 C
Voltage swing configurable to 5 V, 10 V or supply voltage


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