Flexible Logic Architecture
Two devices with 2800 to 5280 LUTs
Offered in WLCS and QFN packages
Advanced 40 nm low power process
As low as 100 A standby current typical
Up to 1024 kb Single Port SRAM
Up to 120 kb sysMEM Embedded Block RAM
Two Hardened I2C Interfaces
Two I/O pins to support I3C interface
Two Hardened SPI Interfaces
Low Frequency Oscillator 10 kHz
High Frequency Oscillator 48 MHz
24 mA Current Drive RGB LED Outputs
Three drive outputs in each device
User selectable sink current up to 24 mA
Signed and unsigned 8-bit or 16-bit functions
Functions include Multiplier, Accumulator, and Multiply-Accumulate (MAC)
Flexible On-Chip Clocking
Eight low skew global signal resource, six can be directly driven from external pins
One PLL with dynamic interface per device
Flexible Device Configuration
SRAM is configured through:
Internal Non-volatile Configuration Memory (NVCM)
As small as 2.15 mm 2.55 mm
Always-On Voice Recognition Application
Tablets and Consumer Hand-held Devices
Hand-held Commercial and Industrial Devices
Multi Sensor Management Applications
Sensor Pre-processing and Sensor Fusion
Always-On Sensor Applications
USB 3.1 Type C Cable Detect/Power Delivery Applications