First Wireless Clocks Supporting 4G/LTE and Ethernet Applications

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Lead Time 35 weeks
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Unit Price:$16.39
Minumum Qty: 1
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The Si5381/82 is a wireless multi-PLL, jitter-attenuating clock that leverages Silicon Labs’ latest fourth-generation DSPLL technology to address the form factor, power, and performance requirements demanded by radio area network equipment, such as small cells, baseband units, and distributed antenna systems (DAS). The Si538x is the industry’s first multi-PLL wireless clock generator family capable of replacing discrete, high performance, VCXO-based clocks with a fully integrated CMOS IC solution. The Si5381/82 features a multi-PLL architecture that supports independent timing paths for JESD wireless clocks with less than 85 fs typical phase jitter as well as Ethernet and other low-jitter, general-purpose clocks. DSPLL technology also supports free-run and holdover operation as well as automatic and hitless input clock switching. This unparalleled integration reduces power and size without compromising the stringent performance and reliability demanded in wireless applications.

• Pico cells, small cells
• Mobile backhaul
• Multiservice Distributed Access Systems (MDAS)

Symmetry Electronics is an authorized Silicon Labs distributor.


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Supports simultaneous wireless and general-purpose clocking in a single device
Jitter performance: 85 fs RMS typ (12 kHz20 MHz)
Input frequency range:
Differential: 8 kHz 750 MHz
LVCMOS: 8 kHz 250 MHz
Output frequency range:
JESD204B: 480 kHz - 2.94912 GHz
Differential: 1 Hz 712.5 MHz
LVCMOS: 480 kHz 250 MHz

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