Web-Customizable, Any-Frequency, Any-Output Quad Clock Generator/Buffer

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Unit Price:$5.39
Minumum Qty: 2500
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The Si5335 is a highly flexible clock generator capable of synthesizing four completely non-integer-related frequencies up to 350 MHz. The device has four banks of outputs with each bank supporting one differential pair or two single-ended outputs. Using Silicon Laboratories' patented MultiSynth fractional divider technology, all outputs are guaranteed to have 0 ppm frequency synthesis error regardless of configuration, enabling the replacement of multiple clock ICs and crystal oscillators with a single device. The Si5335 supports up to three independent, pin-selectable device configurations, enabling one device to replace three separate clock generators or buffer ICs. To ease system design, up to five user-assignable and pin-selectable control pins are provided, supporting PCIe-compliant spread spectrum control, master and/or individual output enables, frequency plan selection, and device reset. Two selectable PLL loop bandwidths support jitter attenuation in applications, such as PCIe and DSL. Through its flexible ClockBuilder™ (www.silabs.com/ClockBuilder) web configuration utility, factory-customized, pin-controlled devices are available in two weeks without minimum order quantity restrictions. Measuring PCIe clock jitter is quick and easy with the Silicon Labs PCIe Clock Jitter Tool.

• Ethernet switch/router
• PCI Express Gen 1/2/3/4
• PCIe jitter attenuation
• DSL jitter attenuation
• Broadcast video/audio timing
• Processor and FPGA clocking
• Fibre Channel, SAN
• Telecom line cards
• 1 GbE and 10 GbE

Symmetry Electronics is an authorized Silicon Labs distributor.


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Low power MultiSynth technology enables independent, any-frequency synthesis of four frequencies
Configurable as a clock generator or clock buffer device
Three independent, user-assignable, pinselectable device configurations
Highly-configurable output drivers with up to four differential outputs, eight single-ended clock outputs, or a combination of both
Low phase jitter of 0.7 ps RMS
Flexible input reference:
- External crystal: 25 or 27 MHz
- CMOS input: 10 to 200 MHz
- SSTL/HSTL input: 10 to 350 MHz
- Differential input: 10 to 350 MHz
Independently configurable outputs support any frequency or format:
- LVPECL/LVDS/CML: 1 to 350 MHz
- HCSL: 1 to 250 MHz
- CMOS: 1 to 200 MHz
- SSTL/HSTL: 1 to 350 MHz
Independent output voltage per driver: 1.5, 1.8, 2.5, or 3.3 V
Single supply core with excellent PSRR: 1.8, 2.5, 3.3 V
Up to five user-assignable pin functions simplify system design: SSENB (spread spectrum control), RESET, Master OEB or OEB per pin, and Frequency plan select (FS1, FS0)
Loss of signal alarm
PCIe Gen 1/2/3/4 common clock compliant
PCIe Gen 3 SRNS Compliant
Two selectable loop bandwidth settings: 1.6 MHz or 475 kHz
Easy to customize with web-based utility
Small size: 4 x 4 mm, 24-QFN
Low power (core):
- 45 mA (PLL mode)
- 12 mA (Buffer mode)
Wide temperature range: 40 to +85C

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